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Wireless Components
ASK Transmitter 345 MHz TDA 5103A Version 1.0
Specification March 2001
preliminary
Revision History Current Version: 1.0, March 2001 Previous Version: 0.1, February 2000 Page (in previous Version) Page (in current Version) 3-3 ... 3-5 3-4, 3-5 3-5, 3-6 4-5, 4-6 3-8, 3-9 3-10 4-1, 4-2 5-3, 5-4 4-1 ... 4-6 5-3 ... 5-5 5-6 ... 5-6 Subjects (major changes since last revision)
Interface schematics inserted Hints on the crystal oszillator revised and moved to paragraph applications Tables adapted, description of power modes revised Timing diagram added new Table corrected for pin1: V > 1.4 V" replaced by pin open" VCO frequency range added, some limits adapted Table inserted: AC/DC characteristics over full supply- and temperature range
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TDA 5103A
preliminary
Product Info
Product Info
General Description The TDA 5103A is a single chip ASK Package transmitter for the frequency band 344347 MHz. The IC offers a high level of integration and needs only a few external components. The device contains a fully integrated PLL synthesizer and a high efficiency power amplifier to drive a loop antenna. A special circuit design and an unique power amplifier design are used to save current consumption and therefore to save battery life. Additionally features like a power down mode, a low power detect and a divided clock output are implemented. fully integrated frequency synthesizer VCO without external components high efficiency power amplifier frequency range 344-347 MHz ASK modulation low supply current (typically 7mA) Keyless entry systems Remote control systems
Ordering Information
Type TDA 5103A available on tape and reel
Ordering Code
Q67036-A1121
Wireless Components
Product Info

Applications

Features
voltage supply range 2.1 - 4 V power down mode low voltage sensor clock output for C low external component count
Alarm systems Communication systems
Package P-TSSOP-10
Specification, March 2001
1
2.1 2.2 2.3 2.4
Table of Contents
1-i
1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-1 2-2 2-2 2-2 2-3
3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 3.2 3.3 3.4 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-1 3-2 3-3 3-6 3-7
4 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 4.2 4.3 4.4 50 Ohm-Output Testboard Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Ohm-Output Testboard Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bill of material (50 Ohm-Output Testboard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4-1 4-2 4-3 4-4 4-5
5 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 5.2 5.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5-1 5-2 5-2 5-3
2
Product Description
Contents of this Chapter 2.1 2.2 2.3 2.4 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
TDA 5103A
preliminary
Product Description
2.1 Overview
The TDA 5103A is a single chip ASK transmitter for the frequency band 344347 MHz. The IC offers a high level of integration and needs only a few external components. The device contains a fully integrated PLL synthesizer and a high efficiency power amplifier to drive a loop antenna. A special circuit design and an unique power amplifier design are used to save current consumption and therefore to save battery life. Additional features like a power down mode, a low power detect and a divided clock output are implemented.
2.2 Applications
Keyless entry systems Remote control systems Alarm systems Communication systems
2.3 Features
Wireless Components

fully integrated frequency synthesizer VCO without external components high efficiency power amplifier frequency range 344-347 MHz ASK modulation low supply current (typically 7 mA) voltage supply range 2.1 - 4 V power down mode low voltage sensor clock output for C low external component count
2-2
Specification, March 2001
TDA 5103A
preliminary
Product Description
2.4 Package Outlines
1.1 max.
0.15 max.
H
A 0.220.05 0.08
M
0.1 A ABC
0.09
0.5
0.42 +0.15 -0.1 4.9 0.25
M
6 max.
ABC
3 0.1
C
30.1 Index Marking
B
Figure 2-1
P-TSSOP-10
Wireless Components
2-3
Specification, March 2001
+0.08 0.125 -0.05
0.85 0.1
3
Functional Description
Contents of this Chapter 3.1 3.2 3.3 3.4 3.4.1 3.4.2 3.4.3 3.4.4 3.4.5 3.4.5.1 3.4.5.2 3.4.5.3 3.4.5.4 3.4.6 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Functional Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 Functional Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 PLL Synthesizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Low Power Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Power Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 PLL Enable Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Transmit Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Power mode control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Recommended timing diagram for ASK-Modulation . . . . . . . . . . . 3-10
TDA 5103A
preliminary
Functional Description
3.1 Pin Configuration
PDWN
1
10
LPD
VS
2
9
PAOUT
GND
3
TDA 5103A
8
PAGND
LF
4
7
COSC
DATA
5
6
CLKOUT
Pin_config.wmf
Figure 3-1
IC Pin Configuration
Table 3-1Pin Configuration Pin No. Symbol Function
1 2 3 4 5 6 7 8 9 10
PDWN VS GND LF DATA CLKOUT COSC PAGND PAOUT LPD
Power Down Mode Control Voltage Supply Ground Loop Filter Amplitude Shift Keying Data Input Clock Driver Output Crystal Oscillator Input Power Amplifier Ground Power Amplifier Output Low Power Detect Output
Wireless Components
3-2
Specification, March 2001
TDA 5103A
preliminary
Functional Description
3.2 Pin Definitions and Functions
Table 3-2
Pin No. 1
Symbol PDWN
Interface Schematic
Function Disable pin for the complete transmitter circuit. A logic low (PDWN < 0.7 V) turns off all transmitter functions. A logic high (PDWN > 1.5 V) gives access to all transmitter functions.
VS 4 0 A D A T A
5 k 1 "O N " 1 5 0 k
PDWN input will be pulled up by 40 A internally by setting DATA to a logic high-state.
2 5 0 k
2
VS
This pin is the positive supply of the transmitter electronics. An RF bypass capacitor should be connected directly to this pin and returned to GND (pin 3) as short as possible. General ground connection.
VS
3 4
GND LF
140 pF 15 pF 3 5 k
Output of the charge pump and input of the VCO control voltage. The loop bandwidth of the PLL is 150 kHz when only the internal loop filter is used. The loop bandwidth may be reduced by applying an external RC network referencing to the positive supply VS (pin 2).
1 0 k 4
Wireless Components
3-3
Specification, March 2001
TDA 5103A
preliminary
Functional Description
5
DATA
+ 1 .2 V
Digital amplitude modulation can be imparted to the Power Amplifier through this pin. A logic high (DATA > 1.5 V or open) enables the Power Amplifier.
+ 1 .1 V
60 k 5 9 0 k
6
CLKOUT
6 300
7
COSC
VS
6 k 7
10 0 A
Wireless Components
3-4
50 pF
30
A
A logic low (DATA < 0.5 V) disables the Power Amplifier.
Clock output to supply an external device. An external pull-up resistor has to be added in accordance to the driving requirements of the external device. The clock output frequency is 2.7 MHz when a crystal of 10.78 MHz is used.
This pin is connected to the reference oscillator circuit. The reference oscillator is working as a negative impedance converter. It presents a negative resistance in series to an inductance at the COSC pin. The resonance frequency of the crystal should be 10.78 MHz to achieve an output frequency of 345 MHz.
Specification, March 2001
TDA 5103A
preliminary
Functional Description
8
PAGND
9
Ground connection of the power amplifier. The RF ground return path of the power amplifier output PAOUT (pin 9) has to be concentrated to this pin. RF output pin of the transmitter.
8
9
PAOUT
A DC path to the positive supply VS has to be supplied by the antenna matching network.
10
LPD
VS 40 A 10 300
This pin provides an output indicating the low-voltage state of the supply voltage VS. VS < 2.15 V will set LPD to the low-state. An internal pull-up current of 40 A gives the output a high-state at supply voltages above 2.15 V.
Wireless Components
3-5
Specification, March 2001
Wireless Components
Po w er D ow n C on trol P ositive S upply VS L ow P ow er D etect O utput
Figure 3-2
C lock O u tp ut
6 10
1 2
3.3 Functional Block diagram
Functional Block diagram
3-6
:4
Pow er Supply
Low voltage S ensor
C rysta l O scillator In put
7
XT A L
PD
:64
VC O
:2
P ow er AM P
On
9
Po w er Am plifier O utp ut
8 LF
P ow e r A m plifie r G ro und
4
Lo op Filte r
3
G rou nd GND
5
D ATA In put
TDA 5103A
Functional Description
Specification, March 2001
preliminary
Block_diagram.wmf
TDA 5103A
preliminary
Functional Description
3.4 Functional Blocks
3.4.1 PLL Synthesizer The Phase Locked Loop synthesizer consists of a Voltage Controlled Oscillator (VCO), an asynchronous divider chain, a phase detector, a charge pump and a loop filter. It is fully implemented on chip. The tuning circuit of the VCO consisting of spiral inductors and varactor diodes is on chip, too. Therefore no additional external components are necessary. The nominal center frequency of the VCO is 690 MHz. The oscillator signal is fed both, to the synthesizer divider chain and to the power amplifier. The overall division ratio of the asynchronous divider chain is 64, a 10.78 MHz crystal should be used. The phase detector is a Type IV PD with charge pump. The passive loop filter is realized on chip.
3.4.2 Crystal Oscillator The crystal oscillator operates at 10.78 MHz. The output frequency at CLKOUT (pin 6) is 2.7 MHz, this is the crystal frequency divided by 4.
3.4.3 Power Amplifier
The VCO frequency 688-694 MHz is divided by 2 and fed to the power amplifier. The Power Amplifier can be switched on and off by the signal at DATA (pin 5).
Table 3-3
DATA (pin 5) Low Open2), High3) 1) Low: 2) Open: 3) High: Voltage at pin < 0.5 V Pin open Voltage at pin > 1.5 V
1)
Power Amplifier OFF ON
The Power Amplifier has an Open Collector output at PAOUT (pin 9) and requires an external pull-up coil to provide bias. The coil is part of the tuning and matching LC circuitry to get best performance with the external loop antenna. To achieve the best power amplifier efficiency, the high frequency voltage swing at PAOUT (pin 9) should be twice the supply voltage. The power amplifier has its own ground pin PAGND (pin 8) in order to reduce the amount of coupling to the other circuits.
Wireless Components
3-7
Specification, March 2001
TDA 5103A
preliminary
Functional Description
3.4.4 Low Power Detect
The supply voltage is sensed by a low power detector. When the supply voltage drops below 2.15 V, the output LPD (pin 10) switches to the low-state. To minimize the external component count, an internal pull-up current of 40 A gives the output a high-state at supply voltages above 2.15 V. The output LPD (pin 10) can either be connected to DATA (pin 5) to switch off the PA as soon as the supply voltage drops below 2.15 V or it can be used to inform a micro-controller to stop the transmission after the current data packet.
3.4.5 Power Modes
The IC provides three power modes, the POWER DOWN MODE, the PLL ENABLE MODE and the TRANSMIT MODE.
3.4.5.1 Power Down Mode In the POWER DOWN MODE the complete chip is switched off. The current consumption is less than 100nA.
3.4.5.2 PLL Enable Mode In the PLL ENABLE MODE the PLL is switched on but the power amplifier is turned off to avoid undesired power radiation during the time the PLL needs to settle. The turn on time of the PLL is determined mainly by the turn on time of the crystal oscillator and is typically less than 1 msec, depending on the crystal. The current consumption is typically 3.5 mA. 3.4.5.3 Transmit Mode In the TRANSMIT MODE the PLL is switched on and the power amplifier is turned on too. The current consumption of the IC is typically 7 mA when using a proper transforming network at PAOUT, see Figure 4-1.
3.4.5.4 Power mode control The bias circuitry is powered up via a voltage V > 1.5 V at the pin PDWN (pin 1). When the bias circuitry is powered up, the pin DATA is pulled up internally. Forcing the voltage at the pin DATA low overrides the internally set state. The principle schematic of the power mode control circuitry is shown in Figure 3-5.
Wireless Components
3-8
Specification, March 2001
TDA 5103A
preliminary
Functional Description
PDWN DATA
On
Bias Source Bias Voltage 120 k
On
PLL
345 MHz
PA IC
PAOUT
Power_Mode.wmf
Figure 3-5
Power mode control circuitry
Table 3-4 provides a listing of how to get into the different power modes
Table 3-4
PDWN Low1) High3) High 1) Low: 2) Open: 3) High:
DATA Low, Open2) Low Open, High Voltage at pin < 0.7 V (PDWN) Voltage at pin < 0.5 V (DATA) Pin open Voltage at pin > 1.5 V
MODE POWER DOWN PLL ENABLE TRANSMIT
Other combinations of the control pins PDWN and DATA are not recommended.
Wireless Components
3-9
Specification, March 2001
TDA 5103A
preliminary
Functional Description
3.4.6 Recommended timing diagram for ASK-Modulation
.
M o d e s:
P o w er D o w n
P L L E n a b le
T ra n sm it
H ig h
PD W N
Low
to t
DATA O p e n , H ig h
D A TA
Low
to t
m in . 1 m se c.
ASK_mod.wmf
Figure 3-6
Recommended Timing Diagram for ASK Modulation
Wireless Components
3 - 10
Specification, March 2001
4
Applications
Contents of this Chapter 4.1 4.2 4.3 4.4 50 Ohm-Output Testboard Schematic . . . . . . . . . . . . . . . . . . . . . . . . 4-2 50 Ohm-Output Testboard Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 Bill of material (50 Ohm-Output Testboard) . . . . . . . . . . . . . . . . . . . . 4-4 Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
TDA 5103 A
preliminary
Applications
4.1 50 Ohm-Output Testboard Schematic
X2SM A C8 C4 VCC C2 L1 VCC C3 CLKOUT L2 R5
10
9
8
7
6
C6
TD A 51 03A
1 2 3 4 5
Q1
C1 VCC T1 VCC R4
R1
C5
X1SM A
50ohm_test_v5.wmf
Figure 4-1
50 -Output testboard schematic
Wireless Components
4-2
Specification, March 2001
TDA 5103 A
preliminary
Applications
4.2 50 Ohm-Output Testboard Layout
Figure 4-2
Top Side of TDA 5103A-Testboard with 50 -Output It is the same testboard as for an other product
Figure 4-3
Bottom Side of TDA 5103A-Testboard with 50 -Output It is the same testboard as for an other product
Wireless Components
4-3
Specification, March 2001
TDA 5103 A
preliminary
Applications
4.3 Bill of material (50 Ohm-Output Testboard)
Table 4-1 Bill of material Part Value Specification
R1 R4 R5 C1 C2 C3 C4 C5 C6 C8 L1 L2 Q1 IC1 T1 B1 X1 X2
4.7 k open open 47 nF 330 pF 3.9 pF 68 pF 1 nF tbd 10 pF 220 nH 56 nH 10.78 MHz TDA 5103A Push-button Battery clip SMA-S SMA-S
0805, 5% 0805, 5% 0805, 5% 0805, X7R, 10% 0805, COG, 5% 0805, COG, 0.1 pF 0805, COG, 5% 0805, X7R, 10% 0805, COG, 0.1 pF 0805, COG, 5% TOKO LL2012-J TOKO LL2012-J
replaced by a short HU2031-1,RENATA SMA standing SMA standing
Wireless Components
4-4
Specification, March 2001
TDA 5103 A
preliminary
Applications
4.4 Hints
1. Application Hints on the crystal oscillator
As mentioned before, the crystal oscillator achieves a turn on time less than 1 msec. To achieve this, a NIC oscillator type is implemented in the TDA 5103A. The input impedance of this oscillator is a negative resistance in series to an inductance. Therefore the load capacitance of the crystal CL (specified by the crystal supplier) is transformed to the capacitance Cv.
-R
L
f, CL
Cv
IC
Cv =
1 1 +2L CL
Formula 1)
CL:
crystal load capacitance for nominal frequency angular frequency inductance of the crystal oscillator
:
L:
Example:
Assume a crystal frequency of 10.78 MHz and a crystal load capacitance of CL = 12 pF. The inductance L is specified within the electrical characteristics at 10.78 MHz to a value of 11 H. Therefore C6 is calculated to 7.5 pF.
Cv =
1 1 + 2L CL
= C6
Wireless Components
4-5
Specification, March 2001
TDA 5103 A
preliminary
Applications
2. Design hints on the buffered clock output (CLKOUT)
The CLKOUT pin is an open collector output. An external pull up resistor (RL) should be connected between this pin and the positive supply voltage. The value of RL is depending on the clock frequency and the load capacitance CLD (PCB board plus input capacitance of the microcontroller). RL can be calculated to:
RL =
1 fCLKOUT * 8 * CLD
Table 4-2 fCLKOUT= 2.7 MHz
CL[pF] 5 10 20 Remark:
RL[kOhm] 8.2 4.7 2.2
To achieve a low current consumption and a low spurious radiation, the largest possible RL should be chosen.
Wireless Components
4-6
Specification, March 2001
5
Reference
Contents of this Chapter 5.1 5.2 5.3 5.3.1 5.3.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 AC/DC Characteristics at 3V, 25C . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 AC/DC Characteristics at 2.1 V ... 4.0 V, -25C ... +85C. . . . . . . . . . 5-5
TDA 5103A
preliminary
Reference
5.1 Absolute Maximum Ratings
The AC / DC characteristic limits are not guaranteed. The maximum ratings must not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC may result.
Table 5-1 Absolute Maximum Ratings Parameter Symbol Limit Values Min Junction Temperature Storage Temperature Thermal Resistance ESD integrity, all pins TJ Ts RthJA VESD Max Unit Remarks
-40 -40 -1
150 125 220 +1
C C K/W kV
100 pF, 1500
Ambient Temperature under bias: TA=-25C to +85C
5.2 Operating Range
Within the operating range the IC operates as described in the circuit description.
Table 5-2 Operating Range Parameter Symbol Limit Values Min Max Unit Test Conditions
Supply voltage Ambient temperature
VS TA
2.1 -25
4.0
V
85
C
Wireless Components
5-2
Specification, March 2001
TDA 5103A
preliminary
Reference
5.3 AC/DC Characteristics
5.3.1
AC/DC Characteristics at 3V, 25C
Table 5-3 Supply Voltage VS = 3 V, Ambient temperature Tamb = 25C Parameter Symbol Min Current consumption Power down mode PLL enable mode Transmit mode IS PDWN IS PLL_EN IS TRANSM 3.3 7 100 4.2 9 nA mA mA Load tank see Figure 4-1 V (Pins 1 and 5) = 0 V Limit Values Typ Max Unit Test Conditions
Power Down Mode Control (Pin 1) Power down mode PLL enable mode Transmit mode Input bias current PDWN Loop Filter (Pin 4) VCO tuning voltage Output frequency range 345 MHz-band VLF fOUT, 345 VS - 1.3 338 345 VS - 0.8 352 V MHz fVCO = 690 MHz VS-VLF = 0.6V...1.6V VPDWN VPDWN VPDWN IPDWN 0 1.5 1.5 0.7 VS VS 30 V V V A VDATA < 0.2 V VDATA < 0.5 V VDATA > 1.5 V VPDWN = VS
ASK Modulation Data Input (Pin 5) Transmit disabled Transmit enabled Input bias current DATA Input bias current DATA ASK data rate VDATA VDATA IDATA IDATA fDATA -20 20 0 1.5 0.5 VS 30 V V A A kHz VDATA = VS VDATA = 0 V
Wireless Components
5-3
Specification, March 2001
TDA 5103A
preliminary
Reference
Table 5-3 Supply Voltage VS = 3 V, Ambient temperature Tamb = 25C Parameter Symbol Min Clock Driver Output (Pin 6) Output current (Low) Output current (High) Saturation Voltage (Low) Saturation Voltage (High) Crystal Oscillator Input (Pin 7) Load capacitance Serial Resistance of the crystal Input inductance of the COSC pin Power Amplifier Output (Pin 9) Output Power1) transformed to 50 Ohm POUT345 3 5 7 dBm fOUT = 345 MHz 11 CCOSCmax 5 100 pF H f = 10.78 MHz f = 10.78 MHz ICLKOUT ICLKOUT VSATL VSATH VS - 0.9 1 -40 0.9 mA A V V VCLKOUT = VS VCLKOUT = 0 V ICLKOUT = 1 mA ICLKOUT = 0 mA Limit Values Typ Max Unit Test Conditions
Low Power Detect Output (Pin 10) Internal pull up current Input current low voltage I LPD1 I LPD2 30 1 A mA VS = 2.3 V ... VS VS = 1.9 V ... 2.1 V
1) Power amplifier in overcritical C-operation. Matching circuitry as used in the 50 Ohm-Output Testboard.
Wireless Components
5-4
Specification, March 2001
TDA 5103A
preliminary
Reference
5.3.2
AC/DC Characteristics at 2.1 V ... 4.0 V, -25C ... +85C
Table 5-4 Supply Voltage VS = 2.1 V ... 4.0 V, Ambient temperature Tamb = -25C ... +85C Parameter Symbol Min Current consumption Power down mode PLL enable mode Transmit mode IS PDWN IS PLL_EN IS TRANSM 3.3 7 250 4.6 9.5 nA mA mA Load tank see Figure 4-1 V (Pins 1 and 5) = 0 V Limit Values Typ Max Unit Test Conditions
Power Down Mode Control (Pin 1) Power down mode PLL enable mode Transmit mode Input bias current PDWN Loop Filter (Pin 4) VCO tuning voltage Output frequency range 345 MHz-band VLF fOUT, 315 VS - 1.5 343.5 345 VS - 0.65 347.5 V MHz fVCO = 690 MHz VS-VLF = 0.6V...1.6V VPDWN VPDWN VPDWN IPDWN 0 1.5 1.5 0.5 VS VS 30 V V V A VDATA < 0.2 V VDATA < 0.5 V VDATA > 1.5 V VPDWN = VS
ASK Modulation Data Input (Pin 5) Transmit disabled Transmit enabled Input bias current DATA Input bias current DATA ASK data rate VDATA VDATA IDATA IDATA fDATA -20 20 0 1.5 0.5 VS 30 V V A A kHz VDATA = VS VDATA = 0 V
Wireless Components
5-5
Specification, March 2001
TDA 5103A
preliminary
Reference
Table 5-4 Supply Voltage VS = 2.1 V ... 4.0 V, Ambient temperature Tamb = -25C ... +85C Parameter Symbol Min Clock Driver Output (Pin 6) Output current (Low) Output current (High) Saturation Voltage (Low) Saturation Voltage (High) Crystal Oscillator Input (Pin 7) Load capacitance Serial Resistance of the crystal Input inductance of the COSC pin Power Amplifier Output (Pin 9) Output Power1) transformed to 50 Ohm POUT345 POUT345 POUT345 Low Power Detect Output (Pin 10) Internal pull up current Input current low voltage I LPD1 I LPD2 30 1 A mA VS = 2.3 V ... VS VS = 1.9 V ... 2.1 V -2.5 0 2 2.5 5 7 5.5 8 10 dBm dBm dBm Vs = 2.2 V2) Vs = 3.0 V Vs = 4.0 V 11 CCOSCmax 5 100 pF H f = 10.78 MHz f = 10.78 MHz ICLKOUT ICLKOUT VSATL VSATH VS - 0.9 1 -40 0.9 mA A V V VCLKOUT = VS VCLKOUT = 0 V ICLKOUT = 1 mA ICLKOUT = 0 mA Limit Values Typ Max Unit Test Conditions
1) Power amplifier in overcritical C-operation. Matching circuitry as used in the 50 Ohm-Output Testboard. Supply-voltage dependency: 2 dB / V at 3 V with reference to 3 V. A smaller load impedance reduces the supply-voltage dependency. Temperature dependency: +1 dB at -25c and -3 dB at +85C with reference to +25C. A higher load impedance reduces the temperature dependency. 2) Power amplifier is switched off at 2.15 V
Wireless Components
5-6
Specification, March 2001

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